# MOS vs BIP

This post is not supposed to be very comprehensive when comparing the MOS with the BIP (bipolar) transistor. However, I thought it could be nice to have it outlined on a single sheet here. MOS stands for metal oxide semiconductor.

Inte picture below we find Lilienfeld vs Shockley. (Yes, yes, yes, one can argue about who did what, etc., but I will let them represent the two transistors). Lilienfeld represents a more square symbol and a “simpler” expression of the current as function of input voltage (in its desired operating region): a polynomial – the square of the input voltage, ube. Shockley presents an exponential function instead – the diode equation. I have sketched the currents as functions of the input voltage and we see that even though the square (MOS) is stronger in the beginning, the exponential quickly comes up to pace and produces higher currents.

The MOS layout is more compact compared to the bipolar. The MOS offers an infinite input resistance (well). The bipolar does not. In fact it must have an input current to operate as desired.

Considering the small signal schematics, the parameters gm (transconductance), gds/go (output conductance) and gp (input conductance) can all be derived as dependent on the current through the transistor. The higher current, the higher everything, sort of. Arguably, this implies that the gain is more or less with current.
At the bottom of the figure, we find the intrinsic gain of the transistors.

For the MOS it is the Early voltage over the effektive input voltage, i.e., gate-source voltage minus the threshold voltage. For the bipolar it is the Early voltage over the thermal voltage (~26 mV). These two gain expressions actually tell us that it is quite likely that the gain is higher for the bipolar than the MOS! (This can also be seen from the MOS transistor operating in the subthreshold region).

Why larger? It is hard to push down the MOS effective voltage to the required 52 mV to match the bipolar relying on the thermal voltage.

# Another glance on the MOS transistor equations

A few posts ago, I created the first part of an EKV-model discussion and we had a somewhat earlier post on MOS modeling. I haven’t compiled part two yet, but thought we could quickly revisit the Schichman-Hodges model and just look at the formulae again, and get a feeling for parameters and relationships. Also revisiting a unified expression for the current in “all” operating regions of the transistor.

## Schichman-Hodges

For hand-calculations of MOS transistors we still, kind-of, use the Schichman-Hodges model from 1968 for the three regions (cut-off, linear, and saturation): $I_D = 0$ $I_D = \frac{\mu_0 \cdot C_{ox} } { 2 } \cdot \frac{W}{L} \cdot \left( 2 \left( V_{gs} - V_{th} \right) - V_{ds}^2 \right)$ $I_D = \frac{\mu_0 \cdot C_{ox} } { 2 } \cdot \frac{W}{L} \cdot \left( V_{gs} - V_{th} \right)^2$

where the parameters are effective carrier mobility, oxide capacitance per area, effective width and length of channel, gate-source voltage, drain-source voltage, and threshold voltage. Of course there should be large approximation signs, due to many reasons as discussed before. The transistor operates in different regions dependent on the voltages across it. See table further down below.

Also, the channel length modulation, lambda, is not included in the formula either.

Anyhow, I’ve always thought the formulas look a bit skewed and not that unified, arguably since they originally aimed at distinct operating regions. The drive and supply voltages were considerably higher than the threshold voltage and the chance/risk of the transistors sliding over between the different regions was very small.

There are suggestions on ways to glue the three regions together and use some indeces back and forth. We can for example introduce the channel length modulation for all three equations. The channel length modulation is (for hand calculations) assumed to be very small, and in the linear region, the inherent low drain-source voltage drop will further diminish its impact. $I_D = 0 \cdot \left(1 + \lambda \cdot \left( V_{ds} - V_{ds, sat} \right) \right)$ $I_D = \frac{\mu_0 \cdot C_{ox} } { 2 } \cdot \frac{W}{L} \cdot \left( 2 \left( V_{gs} - V_{th} \right)\cdot V_{ds} - V_{ds}^2 \right) \cdot \left(1 + \lambda \cdot \left( V_{ds} - V_{ds, sat} \right) \right)$ $I_D = \frac{\mu_0 \cdot C_{ox} } { 2 } \cdot \frac{W}{L} \cdot \left( V_{gs} - V_{th} \right)^2 \cdot \left(1 + \lambda \cdot \left( V_{ds} - V_{ds, sat} \right) \right)$

where I use the drain-source saturation voltage, which Sedra omitted. $V_{ds, sat} = V_{gs} - V_{th}$

Let us consider the linear region first and do some manipulations $\alpha = \frac{\mu_0 \cdot C_{ox} } { 2 } \cdot \frac{W}{L}$ $M = \left(1 + \lambda \cdot \left( V_{ds} - V_{ds, sat} \right)\right)$ $I_D = \alpha \cdot \left( 2 \left( V_{gs} - V_{th} \right)\cdot V_{ds} - V_{ds}^2 \right) \cdot M =$ $= \alpha \cdot \left(\left( V_{gs} - V_{th} \right)^2 - \left( V_{gs} - V_{th} \right)^2 + 2 \left( V_{gs} - V_{th} \right)\cdot V_{ds} - V_{ds}^2 \right) \cdot M =$ $= \alpha \cdot \left(\left( V_{gs} - V_{th} \right)^2 - \left( V_{gs} - V_{th} - V_{ds} \right)^2 \right) \cdot M =$ $= \alpha \cdot \left(\left( V_{gs} - V_{th} \right)^2 - \left( V_{gd} - V_{th} \right)^2 \right) \cdot M =$ $= \alpha \cdot \left(\left(\underbrace{ V_{gs} - V_{th}}_{V_{gs, eff}} \right)^2 - \left( \underbrace{ V_{gd} - V_{th} }_{V_{gd, eff}} \right)^2 \right) \cdot M =$ $= \alpha \cdot \left( V_{gs, eff}^2 - V_{gd, eff}^2 \right) \cdot M$

And actually, we also see that $V_{ds} - V_{ds, sat} = V_{ds} - (V_{gs} - V_{th}) = -V_{gd} + V_{th} = - V_{gd,eff}$

which compiles the equations as $I_D = \frac{\mu_0 \cdot C_{ox} } { 2 } \cdot \frac{W}{L} \cdot 0 \cdot \left(1 - \lambda \cdot V_{gd, eff} \right)$ $I_D = \frac{\mu_0 \cdot C_{ox} } { 2 } \cdot \frac{W}{L} \cdot \left( V_{gs, eff}^2 - V_{gd, eff}^2 \right) \cdot \left(1 - \lambda \cdot V_{gd, eff} \right)$ $I_D = \frac{\mu_0 \cdot C_{ox} } { 2 } \cdot \frac{W}{L} \cdot V_{gs, eff}^2 \cdot \left(1 - \lambda \cdot V_{gd, eff} \right)$

and one could now introduce a couple of binary parameters such that all regions could be covered in one go. $I_D = \frac{\mu_0 \cdot C_{ox} } { 2 } \cdot \frac{W}{L} \cdot r_{on} \cdot \left( V_{gs, eff}^2 - r_{lin} \cdot V_{gd, eff}^2 \right) \cdot \left(1 - \lambda \cdot V_{gd, eff} \right)$

and the table compiles the choices. Now we have only two voltages to consider, and the different regions, and the physical parameters, of course.

Region $r_{on}$ $r_{lin}$ Conditions
Cut-off 0 $V_{gs,eff} < 0$
Linear 1 1 $V_{gs,eff} > 0, V_{gs,eff} > V_{ds,eff}$
Saturation 1 0 $V_{gs,eff} > 0, V_{gs,eff} < V_{ds,eff}$ ## Notably omitted

As always, the brasklapp, reservation is that the formulas above are far from accurate today, and we have not consider for example bulk effects and many, many more effects. However, the target was just to give another glance on the hand calculations and if there are ways to write them just a bit more intuitively…

# How much is a 24-bit converter?

## How much is a 24-bit converter?

A while ago we supervised the design of a linearization module for an R/2R digital-to-analog converter (DAC). It was an interesting piece of work. In general, the resolution was very high and for example, for audio applications, if we consider a 24-bit converter – how much is that? With this post, I just wanted to inspire some thinking…

Well, if we consider a 24-bit converter, the number of levels is simply $L = 2^{24} = 16777216$

so something like 17 megalevels or so. Is that much? Well, “yes”? They say that humans have difficulties visualizing grand scales and I am not sure my picture below will help, but hopefully.

Let us assume our reference range is Mount Everest. Now, I understand that not most of you have seen Mount Everest, but yet. The world’s tallest mountain. We can then add for example Burj Khalifa to the picture, etc. (Not all of us have seen that either, but it is at least approximately 10x smaller).

If we have an object of length x and assume that Mount Everest is A = 8848 meters high, we can express the impressive number of bits (INOB) as $\text{INOB} = \log_2 \left( {2^{24} \cdot \frac{x}{A} } \right) = \log_2{2^{24}} + \log_2 x - \log_2 A = 24 - 13.1 + \log_2 x \sim 10.9 + \log_2 x$

Burj Khalifa thus has an INOB of approximately 20.6 bits (and Mount Everest would be 24 bits). The picture below tries to visualize this in a good manner. But perhaps we need one of thoste tables to make life even better.

Thing INOB
Mount Everest 24
Burj Khalifa 20.6
Airbus 380 17.1
J Jacob Wikner 11.8
A bottle 9.2
An inch 5.6
1 mm 0.9

Or if we would now think in terms of the Earth’s circumference (which is approximately 40000 km), this means that you have to take a walk (or some suitable means of transport) to walk along the equator. Every 2.3 m-ish you have to stop and place a level-indicator pole of some kind.

## Well, that’s in meters, what about good-old Volt?

Now, assume we define the potential drop from top to bottom of Mount Everest to be 1 Volt. Which in turn means that the least-signficant voltage level is 60 nV.
Also going back to our audio case and say that the bandwidth of interest is 22 kHz. We can now compare the levels with the Johnson-Nyquist noise (kT). $v_{nn} = \sqrt{ k T \cdot 22000 } \sim 9.54 nV_{rms}$

and the level of the quantization noise becomes $v_{nq} = \sqrt{ 60^2 / 12 } \sim 17.21 nV_{rms}$

If the voltage swing of our Mount-Everest-DAC is 1 Volt, we are then sniffing around levels of the fundamental noise limit (for the given bandwidths used).