Can we trust the models?

I am preparing this years version of the analog integrated circuit courses (TSTE08 and TSEI12. For this purpose, I need to tweak some of the model cards for the simulator. We do not need the most fancy processes to demonstrate analog circuit design in the courses.

However, while doing this I revisited one old post:

as a way (thanks, Aamir) to plot e.g. the transconductance and output conductance of e.g. a common-source circuit. That is quite powerful in case you want to demonstrate the importance of choosing your operating region or operating point in general. With the above mentioned post, we can plot the parameters, such as the operating region!, as function of e.g. input voltage, etc.

I’ve got a bit confused by the results first after realizing that I was invoking a level-1 model of the MOS in my testbench. Think Shichman-Hodges, hand calculations, if-statements, etc. There are so much material on the properties of the different models and I do not intend to touch upon them here, instead I serve a small comparison…

Consider the testbench below. It is a common-source stage with an NMOS driving transistor with an active, current-mirror load, where we set the current with an ideal current source, ie., forcing current through the drive transistor. We then want to sweep the input transistor DC voltage to find an operating point of interest (or at least get an idea of the operation).

schematic
I will now switch in different models in my model card, and I also append one of those magic extras in an additional file to be able to plot what I want:


save Mdrive:region
save Mdrive:gds
save Mdrive:gm

Level 1

Let us look at the results for different models. First, we start with level 1. One of the most basic models and used for old technologies. We plot the gain (gm/gds), the output voltage (vOut), the transistor’s operating region, the transconductance (gm), and the conductance (gds) as function of the input DC voltage, vInDc.

We can for example see how the transistor sweeps through different operating regions (green, brickwall): cut-off (0) – subthreshold (3) – saturation (2) – linear (1). The transconductance (gm, yellow) follows a more or less linear curve as soon as we enter the saturation region. (Notice that gm = alpha x Veff according to the good-old hand-calculations.

The oddity in this simulation is the gain (blue). Notice that it is plotted in logarithmic scale (!) and for low input DC voltage the gain is huge ~ 30000. We even see that we do have some divide-by-zero happening for low values. Clearly this indicates something unrealistic with the model.

level1

Level 2

Let us see what level 2 can offer. This is the so-called Grove-Frohman model (Google! Interesting guys.) Below we find a similar picture. In this case, the gain looks much more moderate. The treshold voltage is different for this level, which implies a shift of the region towards higher voltages. We see a more soft behavior in the transconductance, but still – at the shift from subthreshold to saturation region (around 0.65 V vInDc) – we see a tendency of a discontinuity. (Notice that we have a finer resolution in vInDc than illustrated by the tick-marks in the graphs).

level2

Level 3

Level 3 – more based on empirical results. Similarly here, we see a discontinuity around the shift from cut-off/subthreshold to the saturation region. Even on the gain curve, we see a clear peaking indicating something strange. It would be more realistic to think of the transition as something continuous. Remember that the blue gain curve is still in a logarithmic scale. The peak hits some 40000 times of gain. The transconductance (yellow) is not all linear as in level 1.

level3

Level 49

Let’s switch to level 49. This is a more modern model and is also called he BSIM3v3 (which comes in different flavours…) Once again the threshold voltage is different. The nice thing here now is that we see a smooth transition between the operating regions – especially from the subthreshold to saturation range. One would think that it is a more accurate model of the real-life transistor, but of course we cannot be all sure.

The gain seems more realistic, no sharp spikes or jumps, and settling towards a final value in a smooth fashion, both for low and high input voltages.

level49

Notice that the threshold voltages are not identical for all the different levels, as well as mobilities, etc., as such, the models are not comparable to – in this case – make a true judgment what’s the most correct model. The same holds for my graphs which have different scales and some with zoom adjusted, etc. Just look for the tendencies.

Different transistors models also try to model different physical phenomena and I will leave it to you to do the research in all books out there.

So, in short – check what you are simulating. Did you switch in correct netlist, correct parameters. Are there discontinuities in the curves? Probably, there shouldn’t be any. Etc.

Noise in an RC integrator

Irfan and I had a discussion on noise in our receiver for body-coupled communication and the fact that noise is built up in the receiver chain.

Just for the sake of argument I calculated the noise in a simple RC integrator to illustrate how you have to select the lower end frequency. Such a block has a DC gain of infinite, which means that low-frequency components are dramatically amplified. The transfer characteristics is 1 / s R C , where s is your frequency variable.

The same holds for 1/f-noise. If you want to find the total noise power of flicker noise, you have to integrate down to 0 Hz which will give you an infinite value. People tend to find this problematic. However, the same actually holds for thermal noise. If you integrate all the way up to infinity you also end up with infinite noise power. Both of them are of course models and in reality there are other things to the models as well as band limitation, etc.

So, just some scribbles with a few tricks associated with them such that I can refer to this page for later use. And I hope I am not wrong now 🙂 please help me to correct the equations then …

Let’s start with an ideal opamp in feedback configuration. Resistor connected between input and virtual ground. Capacitor connected between output and virtual ground.

noise_rcint_1

The noise model of the resistor (thermal noise) is given by an voltage source describing a noisy process with a power spectral density (PSD) of 4 kT R. k is the Boltzmann constant. T is the absolute temperature (in Kelvin). (Notice that it is single-sided noise spectral density.) According to superposition (for linear circuits), we ground the input signal and just look at the contribution from the noise.

noise_rcint_2

According to theory of stochastic processes, we can form the output PSD as the absolute-square transfer function (from noise to output) times the noise PSD. The transfer function from input to output was kind of known from above.

noise_rcint_3

Plugging in the values gives us a rather compact description of the output noise PSD. It is described by an 1/f-square characteristics at the moment.

noise_rcint_4

Let’s integrate that in order to get some idea of the total output-referred noise power (the input-referred noise PSD is already known…). As per Parseval we can find the power of the noise as the integral from some start frequency (which could go down to 0, but let’s wait with that) up to infinity.

noise_rcint_5

By introducing the f0 lower-end frequency and also the time-constant (tau) of the RC integrator, we can further compact the description of the output noise power. We see now that the power is inversely proportional to the RC time constant, to the capacitance, and to the lower-end frequency.

The lower-end frequency can be expressed as the inverse of the maximum expected time of operation (sort-of). Assume you turn your device on for one day. The lowest changing frequency is then 1/86400 Hz.

noise_rcint_6

Now, some “tricks”. The kT factor is found here and there in our designs. At room temperature, this is approximately 4e-21. A handy number to remember. Further on, pi-squared is approximately 10. Eventually, we land at something rather compact again. The longer time our device is on, the more noise power. The higher capacitance the less noise (which is something we also learned in day care centers).

noise_rcint_7

With some example values inserted: assume a time constant of 1 ms and a 1-day operating time, the output noise power can be calculated to have only the capacitance (or resistance) left.

noise_rcint_8

With a 1-microfarad capacitor, the resistance becomes 1 kOhm and the output power is 0.35 microwatt.

noise_rcint_9

noise_rcint_10

What tones to select when testing your DAC?

This post touches upon an older post I did once (cannot find it right now).

In a sampled system, we will “suffer” from folded tones back and forth in our spectrum. For example, if we apply a 3-MHz sinusoid to a digital-to-analog converter (DAC) sampling at 10 MHz, we will get a tone at 3 MHz at the output too (luckily).

However, if there is distortion in the sampling process (notice that it has to be distortion in the components that are sampled/updated at regular basis, i.e., on the sample frequency). If we have distortion of the second and third order, we would expect to see a fundamental tone at 3 MHz and the distortion terms at 6 and 9 MHz. Due to the folding principles (well, essentially Poisson’s formula), we will also see the distortion terms coming in at 4 MHz (the second) and 1 MHz (the third).

This is not necessarily a problem, but if the tones are too close to each other, it might be difficult to isolate them properly with your test script, and if they are strong enough, the might hide some vital information wrt. the system you would like to evaluate (assume you are testing your DAC).

For example, assume you have a signal at 2.5 MHz and distortion up to fifth order, then the fifth harmonic will land right on top of your fundamental. Or why not take the classical example of displaying a fully linear DAC in your test case: use a signal frequency at a quarter of the sample frequency. All distortion terms will end up at DC, half the sample frequency (often omitted due to “clock feedthrough” or similar), and on top of the signal it self. Display the spectrum and you would have an amazingly linear converter…

Anyways, just for some inspiration. Below I show the results when I have simulated the tones that are “acceptable” under the following conditions:

  • The number of bins in your FFT is 2048
  • The order of distortion is (up to) 9
  • The number of Poisson repetitions is 100 (take ten times the order of the distortion for the fun of it).
  • The distance between two terms cannot be less than the number of bins / 32 (a “fixed” frequency makes sense here rather than something depending on the signal frequency.)

The values that are 0 indicate a poorly chosen tone/bin for your signal. So, select one of the non-zero terms and apply your ifft and voila – you have a well-behaved spectrum in which you can determine your SNDR/SFDR/THD a bit more easy.

goodtones

And I am only plotting the values up to half the sample frequency. Anything above would be folded (agtain …)

Silly script: Two-stage OP compensation

As a complement to one of my lectures on compensation of operational amplifiers, I wrote a crude MATLAB example for testing stability and ability to loop for example currents, voltages, etc. In some sense, this could be done using veriloga blocks and slighlty more accurate circuit descriptions. But yet — this is a quite good way of understanding the operation of something as simple as a two-pole system.

I’m referring to a standard two-stage amplifier with a differential-pair in the first stage and a common-source at the output. Attached is also a plot result from octave illustrating the pole/zero placement.

Octave plot of phase and amplitude

Octave plot of phase and amplitude

And you get some results in raw format:

octave:1> antikPoleZero
f_ug = 3.0917e+08
phi_m = 54.465
p_1 = -1.1171e+05
p_2 = -3.2733e+09
p_3 = -7.7695e+12
z_1 = 2.2957e+10

So, just an example/suggestion of simple ways to get some more understanding of the operation of the circuit.


%
% Mainly, this "demo" concentrates on the classical two-stage
% amplifier. This implies also that we have not employed the
% suggested technique by J. Baker, et al.
%
% Some of the design rules:

% Miller

% z_1 approx 10*w_ug => gm_II = 10*gm_I
% p_2 approx 2.2*w_ug => C_C = 0.22 * C_II
% or more generically => C_C = 2.2*C_II/(gm_II/gm_I)

% Nulling resistor:

% And then (nulling resistor option 2, where z_1 -> inf):
% p_2 approx 1.73*w_ug => C_C = 1.73 * C_II / (gm_II/gm_I)
% p_3 > 10 * w_ug
% R_Z = 1/gm_II

% Setting up the frequencies
% No need to touch this
% =========================================================
N = 256;
f = logspace(1, 11, N);
w = 2*pi*f;
s = j*w;

% Some "process"-dependent parameters. Assuming a relatively
% strong channel-length modulation.
lambda = 0.05;

% =========================================================

% =========================================================
% Do your changes here. Why not a for loop on top? You can
% characterize the phase margin as function of tail current,
% or similar.
% =========================================================
% =========================================================
% =========================================================

% Going to a more circuit-level representation:
% Tail current through the differential pair.
I_0 = 100e-6;

% Effective input voltage on diff-pair transistors:
Veff_I = 0.2;

% The second-stage driving capacitor. For sake of argument,
% the effective is slightly higher here.
Veff_II = 0.4;

% The mirror ratio between the output stage and the input
% stage, i.e., the output stage drives K times more current
% than the differential pair.
% Notice that the gm_II = gm_I * K * Veff_I / Veff_II;
K = 20;

% Internal stage capacitance. For sake of modeling, we have
% assumed that the drive transistor in the second stage also
% scales with K (given a constant current and Veff_II).
% C_I is approximately the CGS of the drive transistor.
% Assuming some fF-cap on the gate:

C_I = K*10e-15;

% C_II is the load capacitance.
C_II = 2e-12;

% Some tentative compensation network to start with.
C_C = 0.22 * C_II;
R_Z = 1 ; % AND ALSO SEE BELOW!

% =========================================================
% =========================================================
% =========================================================

% We can now form the different parameters, etc.
% Given the parameters above, calculate the transfer function:
% No need to touch this.
% =============================================================

% First stage:
gm_I = 2*I_0 / Veff_I;
g_I = lambda*I_0;
% Second stage:
gm_II = 2*K*I_0/Veff_II;
g_II = lambda*K*I_0;

A_I = gm_I / g_I;
A_II = gm_II / g_II;

a = A_I * A_II;
b = (C_II + C_C)/g_II + (C_I+C_C)/g_I + a*C_C/gm_I + R_Z*C_C;
c = ((1/(g_I*g_II))*(C_I*C_II + C_C*C_I + C_C*C_II) + ...
R_Z*C_C*(C_I/g_I + C_II/g_II));

d = R_Z*C_I*C_II*C_C/g_I/g_II;

z_1 = 1/(C_C/gm_II - R_Z*C_C);

% =========================================================
% =========================================================
% =========================================================
R_Z = 1 /gm_II;
% =========================================================
% =========================================================
% =========================================================

A_s = a * ( 1 - s /z_1) ./ ...
( 1 + b*s + c*s.^2 + d*s.^3);

% Derive the roots as:
p = roots([1 c/d b/d 1/d ]);

% Just for some pretty-printing.
p_1 = p(3);
p_2 = p(2);
p_3 = p(1);

% Amplitude and phase characteristics
log_A = 20*log10(abs(A_s));
ang_A = 180*unwrap(angle(A_s))/pi;

% Find the unity-gain frequency (in Hz) and phase margin

f_ug = mean(f(find(abs(log_A)==min(abs(log_A)))));
phi_m = mean(ang_A(find(abs(log_A)==min(abs(log_A)))))+180;

% the mean-thing is there to avoid some numerical issues.

fh = figure(1);
subplot(2,1,1);
sh(1) = semilogx(f, log_A);
hold on;
ph(1) = plot(abs(p_1/2/pi), 0, 'x');
ph(2) = plot(abs(p_2/2/pi), 0, 'x');
ph(3) = plot(abs(p_3/2/pi), 0, 'x');
ph(4) = plot(abs(z_1/2/pi), 0, 'o');
lh = line(f_ug*[1 1], [20*log10(abs(A_s(1))) -150]);
tl(1) = title('Amplitude characteristics');
tl(2) = ylabel('|A^2(j \omega )|');
hold off;

subplot(2,1,2);
sh(2) = semilogx(f, ang_A);
hold on;
ph(5) = plot(abs(p_1/2/pi), 0, 'x');
ph(6) = plot(abs(p_2/2/pi), 0, 'x');
ph(7) = plot(abs(p_3/2/pi), 0, 'x');
ph(8) = plot(abs(z_1/2/pi), 0, 'o');
lh = line(f_ug*[1 1], [0 -180]);
tl(3) = ylabel('arg{ A(j \omega )}');
tl(4) = xlabel('Frequency [Hz]');
hold off;

set(tl,'FontSize',18);
set(ph,'LineWidth',4);
set(sh,'LineWidth',4);

% =============================================================
% Dumping some data in raw format

f_ug
phi_m
p_1
p_2
p_3
z_1

% =============================================================

Two-stage OP and macro model

Two-stage OP and macro model

Top Ten: Mixed-signal design books

After some Christmas and New Year holidays as well as wrapping up our course in Mixed-Signal Processing Systems, I think the activity should improve here a bit…

Perhaps starting off with a new Top Ten list…

Since the two courses Analog and Discrete Time Integrated Circuits and Analog Integrated Circuits are to be given this spring (starts in a week or so…) I though it would be nice to start off with a book list. Searching for valid literature within the field of mixed-signal integrated circuit design is a bit tedious. One drawback is that the books are soon outdated. CMOS processes, standards and applications are evolving and the books should feel fairly modern to read. Obviously, some of the basics wrt. filter theory, compensation, etc., do not change, but still … using 10-year old transistor parameters for examples makes the students a bit doubtful.

Anyway, so let’s start (and in this case, no particular order – albeit a bit biased). And the standard disclaimers: The list is not intended to be complete, please add comments with your own examples. And I will not write a complete review, but only give you the link such that you can continue your googling on your own.

So, This is my list of the Top Ten text books for integrated mixed-signal circuit design on an advanced Bachelor’s level, Master level and Ph.D. level.

  • #10: CMOS Data Converters for Communications , by Gustafsson, Wikner, and Tan. and Mixed-Signal Processing Systems, edited by Löwenborg
    We have to start somewhere to get the snowball rolling. and it is perhaps a bit ambitious to put two of our “own” books on this list, but after all there were reasons they were written in the first place. In our case, we needed a book on data converters and then we needed a comprehensive book on the design of mixed-signal systems.

    The data converters book is not a course text book as such, but explains quite well some of the more detailed design aspects of data converters to be put into a telecommunication application. (The book outlines ADSL which was a “hot” topic back in the late 90’s, early 00’s). So, with that said, it is also a bit outdated. The book does not outline any theory behind transistors, etc., so don’t expect that. It is more to be considered as a reference book for data converter design. There are no exercises either.
    The mixed-signal processing book is indeed a dedicated spot-on course book, but without exercises. The book is a compilation of several chapters were each single chapter fills a very important role in the complete design of a mixed-signal communication system (AFE plus parts of PHY). There are chapters on digital-filter design, top-level design, test-driven design, analog filters, data converters, tuning, etc. Each chapter written and compiled by experienced Ph.D. students.

  • #9: CMOS Analog Circuit Design , by Allen and Holberg
    This is my starting book back in 1996 and more or less the first book with integrated CMOS transistors as scope that I ever opened. First, I was a bit scared, since it seemed a bit “dry”, but now after some years, I still claim it is very good book from a theoretical point of view. It has good examples, it has a very good description of how to design an operational amplifier and how to compensate it well. It gives a couple of cookbook recipes for the most common amplifier types.

    The book now exists in a second edition with a few updated chapters and still has a very good theoretical background.
  • #8: Design of Analog CMOS Integrated Circuits, by Razavi.
    This is a somewhat “newer” book which spans more circuits, but perhaps less in detail of things. In this book we find more information on PLLs, bandgaps and the kind of circuits you would expect to find in today’s mixed-signal macros. The book also solely focuses on CMOS circuits.
    Data converters are not covered, which is potentially a drawback with the book. On the other hand, one should also acknowledge the title of the book, which does not imply the digital portion of the circuits.
  • #7: Analog Integrated Circuit Design, by Johns and Martin
    Probably my favourite currently (but I’m a fan of many books, even for courses, especially since the development is so dynamic and one has to stay tuned…). The book has a nice format, easy-to-read, good exercises, etc. The advantage with the book is that it also contains data converters, switched-capacitor circuits, and a short chapter on PLLs. I find it a very good educational book, with a lot of good examples and exercises.
    I use it as the main course book in the two analog courses I give at the University. The book, however, is now some 15 years old and I’m eagerly waiting for a new edition.
  • #6: Analysis and Design of Analog Integrated Circuits, by Gray, Hurst, Lewis, and Meyer.
    The brick. This is is 900 pages of pure analog design. It has excellent chapters on feedback and compensation theory as well as operational amplifier design. It outlines differential design well (which is quite poorly done in most books). The “drawbacks” are that it is very analog and lacks the most important mixed-signal circuits and it has potentially too much of introduction with respect to semiconductors. (Notice that this is not drawbacks as such, but for the mixed-signal design scope … ). The book is now offered in it’s fifth edition which also indicates the robustness and popularity of the book.
    I recommend my students (and you too in case you’re not a student of mine) to read the feedback chapters. Most interesting.
  • #5: Analog Design Essentials by Willy Sansen.
    Now, this is a “new-comer” on the market, well 2006. The main advantage is the nice way of interchanging lecture slides with text and exercises. This is not only a book for a course lecturer, but also for engineers that can get “easy-reading” with clear slides/pictures that guides the reader. Using this presentation method, the book also becomes very easy to read and browse.
    I am now using it as reference material for my courses and my Ph.D. students are also using it.
  • #4: The Design of CMOS Radio-Frequency Integrated Circuits, by Lee.
    Ok, so here we could argue that it is not a mixed-signal book. However, it has a couple of great chapters. Especially those on noise (two chapters on noise) and feedback. Further on, the oscillator chapters and phase-locked loop chapters nowadays would classify as mixed-signal systems in some sense. The book also spans some other “minor” topics that are missing in some of the other books, like performance measures (SNDR, SFDR, etc.) as well as nomenclature also found for normal analog design, such as Class A, B, C, etc. (In Lee’s case, they are referred to in the PA chapter).
    I would also like to recommend the reader to really read the footnotes (as well as the historic “tales”) in the book. There are some really fun comments by Lee in there.
  • #3: CMOS: Mixed-Signal Circuit Design, by Baker
    This is a “hardcore” book getting directly to the point in some sense. There is not that many discussions on the “simplest” building blocks, but instead we get to the filters, data converters, etc. This scope and focus resembles quite a lot the work we do in our mixed-signal processing systems course (which is also the next bullet on this list).

    One great advantage with the Baker book is the “support” from the CMOSEDU web pages, design examples, etc. are found for a large variety of simulators. There are slides, solutions, forums, etc. Very good backup indeeed.
  • #2:Analog VLSI: Signal and Information Processing, by Ismail and Fiez.
    The last two bullets on this list are perhaps not educational text books as such (well, this one is…) but I add them due to nostalgic reasons. They are also the first two books I kind of read as a fresh Ph.D. students back in 1996.
    The book by Ismail and Fiez is from 1994 and I am not sure if it is available for purchase in new-print anymore (the link above is pointing at used books). It is claimed that: “This book presents the first comprehensive treatment of analog VLSI design for signal and information processing applications by blending the basic design concepts of both traditional and contemporary analog VLSI.”. And in some sense it was true back then… It also contains a few examples to “fun” circuits back then, like the super-MOS component, the neurological circuits, etc. It was an inspiring book by then, as it gave me a completely different view on analog integrated circuit design. Rather than just dull (?) amplifiers, there were new things in it!
  • #1: Analogue IC design: the current-mode approach, , by Toumazou, Lidgey, and Haigh (eds) and Switched-currents: an analogue technique for digital technology, by Toumazou, Hughes, and Battersby (eds).
    As for the previous item, this was an eye-opener too. Back in those days, the switched-current technique was (re-)invented and it was fresh material to read. It also opened up for new types of analyses. At our group, quite a lot of switched-current work was published and resulting in Ph.D. dissertations. (If Bengt E Jonsson reads this, he might be able to fill in some gaps.
    The books are perhaps not course books, but they are inspirational for an analog design engineer with some curiosity in “odd” things.

And/or take this poll:

CAD:Just a reminder about Spectre and long simulations

Just a reminder for those who run long simulations in Cadence Spectre, especially the transient ones:

  • Set the saveclock option (in seconds) to the time interval at which you want your simulator to save its state.
  • Set the savefile option to a file name in which you want to save your state.
  • Set the recover option to a file name from which you want to load your state.

So, if you set saveclock to 60, spectre will regularly, every minute save its state to savefile. You can launch the long simulation and press stop and restart as many times as you like. Spectre will restart at the latest minut (clockwise). This is quite handy if there is a power cut or network is dropped.

Notice that the file is overwritten and if you want to save several minutes back, you need to have another script running in parallel saving that data for you. This could also be a handy strategy considering that in the worst case (which is also the most likely case according to Mr. Murphy) you might be writing to disk, just as Spectre or connection dies.

Notice also that you can alter some of the simulator settings. For example the number of nodes saved. This means you can set the simulator to log all nodes first, check them after a while, then stop. Remove some of the probes to save time/disk area, and re-run. Quite handy!

Silly script: Create OCEAN desVars

As we are now ramping up some of the projects for the TSTE16 course at our university, I wanted to just propose a small snippet to get your design variables from MATLAB into Cadence (or more exactly the OCEAN-script for simulating Spectre). The idea is to have MATLAB as master in these projects. This also implies that you want to set any design variables using MATLAB rather than hacking multiple files and risking loosing track of what you’ve been doing.

There are many ways to do this:
(1) One option is to use the simulink interface provided by MATLAB and Cadence, but is a bit over the top in this case.
(2) Another option is to create all the required netlists in the Cadence ADE environment. This will actually generate multiple files in your simulation directory. The “full” file which will be used for spectre is normally called “input.scs” . Further on, if you play that play button (Cadence 6) and study the log file, you actually see in the text which spectre command that is run. (Further on, this command is also stored in the runSimulation “script” stored by Cadence in that directory). The input.scs file is just a concatenation of several files, such as netlistHeader, netlist, netlistFooter — but also some dot-files, like .modelFiles and .designVariables. The latter is a text version of your variables that you could alter if you like. Then concatenate the files into the input.scs accordingly. And run. Requires some more hands on and have less post-processing options.

(3) Or assume we have already generated the Cadence test bench and generated an OCEAN script with a bunch of desVar definitions in it. We can replace those rows with a load command, e.g.

(loadi "tste16ProjDesVars.il")

which you have stored accessible somewhere.
Then make sure you can change that file with MATLAB. Like for example:


desVar(1).Name = 'vccr12';
desVar(1).Value = 1.2;

desVar(2).Name = 'vLo';
desVar(2).Value = 0.1;

desVar(3).Name = 'vHi';
desVar(3).Value = 1.1;

desVar(4).Name = 'compGain';
desVar(4).Value = 1000;

fClk = 1e6;
desVar(5).Name = 'fClk';
desVar(5).Value = fClk;

sigLength = 8;
desVar(6).Name = 'sigLength';
desVar(6).Value = sigLength;

desVar(7).Name = 'tStop';
desVar(7).Value = sigLength/fClk;

desVar(8).Name = 'daisyDemoTopReadFile';
desVar(8).Value = '/home/jacobw/TSTE16/testIn.txt';

desVar(9).Name = 'daisyDemoTopWriteFile';
desVar(9).Value = '/home/jacobw/TSTE16/testOut.txt';

%% This part would then be in a separate function.
fid = fopen('tste16ProjDesVar.il','w');
fprintf(fid, ';; ==================================== \n');
fprintf(fid, ';; Design variables generated by MATLAB \n');
fprintf(fid, ';; ==================================== \n');
for M = 1:length(desVar);
if isstr(desVar(M).Value)
fprintf(fid, '(desVar "%s" "\\"%s\\"")\n', desVar(M).Name, ...
desVar(M).Value);
else
fprintf(fid, '(desVar "%s" %f)\n', desVar(M).Name, ...
desVar(M).Value);
end
end;
fprintf(fid, ';; ==================================== \n');
close(fid);

Where I have used structs to store the intermediate design variables. You can also store strings into the design variables to pass on file names or similar to verilog A blocks in Cadence.
This gives you a file like


;; ====================================
;; Design variables generated by MATLAB
;; ====================================
(desVar "vccr12" 1.200000)
(desVar "vLo" 0.100000)
(desVar "vHi" 1.100000)
(desVar "compGain" 1000.000000)
(desVar "fClk" 1000000.000000)
(desVar "sigLength" 8.000000)
(desVar "tStop" 0.000008)
(desVar "daisyDemoTopReadFile" "\"/home/jacobw/TSTE16/testIn.txt\"")
(desVar "daisyDemoTopWriteFile" "\"/home/jacobw/TSTE16/testOut.txt\"")
;; ====================================

Happy hacking!