Mixed-Signal Design

I intend to supervise a number of mixed-signal final-year projects, suitable for those who want to implement CMOS integrated circuits from system downto layout level.

Typically, we will look at implementations of data converters, switched-capacitor circuits, and similar mixed-signal circuits, etc., specifically for low-voltage and low-power applications. (Not necessarily ultra-low power or ultra-low voltage, eventhough that is of course interesting too).

Currently we are looking to implement all circuits in a standard 65-nm CMOS process. And we hope to bring as much as possible down to layout, which means that some of the suggested projects below are more suitable for two people rather than one.

Suggestions on final-year projects are:

  • A 300-MHz, 32-phase DLL in 65-nm CMOS. The DLL should take an input clock and extract 32 phases out of that clock period. The phases must be monotonic.
  • Components in a 12-bit 300-MSps ADC (this contains several sub projects, such as comparators, bias, logic, references, logic, etc.)
  • A low-voltage fully differential Programmable Gain Amplifier (Syed Aamir is already working on this)
  • An all-digital 5-GHz PLL with 10 to 300 MHz output frequency (this contains several sub projects)
  • An on-chip, active adjustable second order LP filter in the range 10 to 500 MHz to be combined with the above mentioned PGA.
  • A bandgap reference producing a number of reference voltages and reference currents
  • An input multiplexer for the video signals
  • A voltage and current clamp circuit to restore DC and midscale levels
  • A digital background calibration scheme

Please welcome and suggest some topics of your own.

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