Gain of a folded-cascode amplifier

The exam exercise

The other day we had exam in the Analog and Discrete-Time Integrated Circuits course. One of the questions related to this picture.

Find the DC gain and motivate your steps to solve it. The students are allowed to bring their own material, so in some sense, they would/should/could already know the answer. I was interested in seeing how they would solve it. So this is my simplified view of solving the exercise. Quite a few of the students went over-ambitious on the exercise. Not wrong, of course, just bypassing some of the “analog” spirit. (No! I am not saying being sloppy is “analog”.)

The steps to success

First, identify that it is symmetrical. We only need to look at one side.

Then we identify that in the remainder of this circuit, the lower part is a cascoded current source.

We kind of know the impedance of this one. It is (approximately):

$g_{out} = g_8 g_{10} / g_{m8}$

Then look at the differential pair. The common-node can be considered grounded if a true symmetric signal is applied (which we did above).

This means that, from an AC-perspective, the common-node can be treated as the positive supply node, i.e., 0. This means that M2 pops up in parallel with M4.

So, with that in mind, we go creative and pick a piece of paper (and a pen). Let’s draw the small-signal schematics for the resulting output. At the bottom we find the cascoded current source.

What happens up there? Well, actually it is very similar to the NMOS pair in the bottom right? Transistor M7 acts as cascode for the configuration on the top. This means that the impedance of M2 and M4 will be amplified by the cascode thus effectively forming a cascoded current source with high output impedance (low output conductance).

Further more, since the first stage amplifier (the differential pair) connects to the drain-source pair of M4 and M7, it sees a low-impedance load. This in turn means that the amplifier can be seen as a single-stage amplifier (give or take) which means that the gain can be written in the form:

$A = g_m / g_{out}$

where gm is the transcondutance of the drive transistor (M2 in our case) and gout is the output conductance seen from the output node when all active sources are cancelled.

For that to happen, we set vin to 0 and what do we have then left in the figure? A cascoded current source on the top and a cascoded on the bottom. We can quickly see that:

$g_{up} = (g_4 + g_2) g_7 / g_{m7}$

and

$g_{dn} = g_{10} g_8 / g_{m7}$

we already new. The combined output conductance is thus

$g_{out} = g_{dn} + g_{out} = (g_4 + g_2) g_7 / g_{m7} + g_{10} g_8 / g_{m7}$

And eventually, we get the overall gain to be

$A = \frac{g_{m2}}{g_{out}} = \frac{g_{m2}}{ g_{dn} + g_{out} = (g_4 + g_2) g_7 / g_{m7} + g_{10} g_8 / g_{m7}}$

so, so… And there should be quite a few approximations along the path. We do not have to be superduper accurate as long as we capture the essential parts. The model as such is inaccurate anyway. Capture the major things: gm and g.