I am preparing this years version of the analog integrated circuit courses (TSTE08 and TSEI12. For this purpose, I need to tweak some of the model cards for the simulator. We do not need the most fancy processes to demonstrate analog circuit design in the courses.
However, while doing this I revisited one old post:
as a way (thanks, Aamir) to plot e.g. the transconductance and output conductance of e.g. a common-source circuit. That is quite powerful in case you want to demonstrate the importance of choosing your operating region or operating point in general. With the above mentioned post, we can plot the parameters, such as the operating region!, as function of e.g. input voltage, etc.
I’ve got a bit confused by the results first after realizing that I was invoking a level-1 model of the MOS in my testbench. Think Shichman-Hodges, hand calculations, if-statements, etc. There are so much material on the properties of the different models and I do not intend to touch upon them here, instead I serve a small comparison…
Consider the testbench below. It is a common-source stage with an NMOS driving transistor with an active, current-mirror load, where we set the current with an ideal current source, ie., forcing current through the drive transistor. We then want to sweep the input transistor DC voltage to find an operating point of interest (or at least get an idea of the operation).
Let us look at the results for different models. First, we start with level 1. One of the most basic models and used for old technologies. We plot the gain (
gm/gds), the output voltage (vOut), the transistor’s operating region, the transconductance (
gm), and the conductance (
gds) as function of the input DC voltage, vInDc.
We can for example see how the transistor sweeps through different operating regions (green, brickwall): cut-off (0) – subthreshold (3) – saturation (2) – linear (1). The transconductance (gm, yellow) follows a more or less linear curve as soon as we enter the saturation region. (Notice that gm = alpha x Veff according to the good-old hand-calculations.
The oddity in this simulation is the gain (blue). Notice that it is plotted in logarithmic scale (!) and for low input DC voltage the gain is huge ~ 30000. We even see that we do have some divide-by-zero happening for low values. Clearly this indicates something unrealistic with the model.
Let us see what level 2 can offer. This is the so-called Grove-Frohman model (Google! Interesting guys.) Below we find a similar picture. In this case, the gain looks much more moderate. The treshold voltage is different for this level, which implies a shift of the region towards higher voltages. We see a more soft behavior in the transconductance, but still – at the shift from subthreshold to saturation region (around 0.65 V vInDc) – we see a tendency of a discontinuity. (Notice that we have a finer resolution in vInDc than illustrated by the tick-marks in the graphs).
Level 3 – more based on empirical results. Similarly here, we see a discontinuity around the shift from cut-off/subthreshold to the saturation region. Even on the gain curve, we see a clear peaking indicating something strange. It would be more realistic to think of the transition as something continuous. Remember that the blue gain curve is still in a logarithmic scale. The peak hits some 40000 times of gain. The transconductance (yellow) is not all linear as in level 1.
Let’s switch to level 49. This is a more modern model and is also called he BSIM3v3 (which comes in different flavours…) Once again the threshold voltage is different. The nice thing here now is that we see a smooth transition between the operating regions – especially from the subthreshold to saturation range. One would think that it is a more accurate model of the real-life transistor, but of course we cannot be all sure.
The gain seems more realistic, no sharp spikes or jumps, and settling towards a final value in a smooth fashion, both for low and high input voltages.
Notice that the threshold voltages are not identical for all the different levels, as well as mobilities, etc., as such, the models are not comparable to – in this case – make a true judgment what’s the most correct model. The same holds for my graphs which have different scales and some with zoom adjusted, etc. Just look for the tendencies.
Different transistors models also try to model different physical phenomena and I will leave it to you to do the research in all books out there.
So, in short – check what you are simulating. Did you switch in correct netlist, correct parameters. Are there discontinuities in the curves? Probably, there shouldn’t be any. Etc.