TSTE16::The 2011 Welcome!

A “short” welcome text for you who are not on the mailing lists, but want to find out more about the course.

Dear attendees,

welcome to the TSTE16 course 2011! The course lectures will start on September 1. Just after the


conference that we are currently arranging. Please read through this lengthy e-mail for more information on the course.

The Mixed-Signal Processing Systems (TSTE16 or MSPS) course has throughout the years turned out to be a quite popular course. Last year we got a course evaluation of 4.75 and the year before that we scored 4.5. We are happy to offer this popular course and we hope to make it even more appreciated this year!

Still, though, since this is a quite massive project course – a lot of effort to make the course interesting and meaningful also lies on you as a course attendee.

Find out more information about the actual course contents on


The MSPS is a project-based CDIO course with a hybrid of the LIPS project model which is used in several of the courses at Linköping University. More information on the LIPS model can be found in a new text book authored by Tomas Svensson and Christian Krysander.

Further on, the projects will have quite strong industrial perspective, where examiner/supervisors will act as customers and you will act as contractors. We will mimic typical documentation scenarios, milestones, deliverables, etc., as you would find in situations where you would deliver an IP, i.e., an integrated circuit, to a customer for integration in their SOC. The examiner and supervisors have a combined > 20-year industrial experience in this field.

Your roles in the project will rotate! This means that we will not assign a constant project manager, etc., throughout the project. Instead – each week we will rotate the responsability. We have got different feedback on this

Information, questions, feedback, follow-ups, time-reporting, etc., will also follow a quite strict procedure to further mimic the industrial scenario.

We will during the first lecture form the project groups. There are currently 28 people registered for the course, which seems to call for a batch of four groups with seven people in each. You will form the groups yourselves during the first lecture or the day after.

The course book is a bit delayed, but should be with LiU-Tryck (A-huset) shortly. The book is kind of mandatory and has been very popular reference material throughout the years.

Please also follow up for more information on


The blog (above) is used for posting material a bit more dynamically than through the html pages. You can also look into older posts from previous years which could give you some inspiration. This e-mail will also be posted on the blog.

Once you have taken this course you will have a much better view of industrial IC projects, top-down methodology, co-simulation of MATLAB
and cadence, specification-driven design.

Best regards and let us turn this course into a success also this year!

J Jacob Wikner, Examiner/Supervisor
Niklas U Andersson, Supervisor
Anu Kalidas Muralidharan Pillai, Supervisor
Syed Ahmed Aamir, Supervisor

5 thoughts on “TSTE16::The 2011 Welcome!

  1. Thanks,

    well, 7 is actually not that high number in this project. In the course we will design a transceiver and simulate/design it well. In the transceiver, you will find:

    1) Upsampling and interpolation filter (interpolator)
    2) DAC
    3) Analog Tx filter (reconstruction filter)
    4) Channel
    5) Analog Rx filter (antialiasing filter)
    6) ADC
    7) Downsampling and decimation filter (decimator)

    Now, that gives you 7 responsibilities per week. Then in addition we have:

    8) Project manager, top-level responsible
    9) Project secretary, documentation and reporting


    So, it turns out quite quickly that six people is too few, especially if you want to learn about most aspects of a transceiver.

  2. I am planning to take the course; looking forward to it, actually. I also have a couple of 6-credit courses. It is just that I am not sure if I will have enough motivation for the digital parts as I would have for the analog ones.

  3. Dear Fikre,
    excellent! I remember you did very well on the ATIK course (analog and discrete-time integrated circuits for you others …), so I do understand your concerns wrt. the digital parts 😉
    However, it should be mentioned here that with “digital” we mean on a MATLAB level mainly. The course will not (unless the groups so desire) touch upon RTL/verilog/synthesis. The simulations will mainly be on behavioral-level. Of course, some “digital” aspects must be taken into account, like limited wordlength, reasonable filter sizes, etc.

    In terms of workload, the real work starts towards the second autumn period. In terms of hours, the target is something like 160 to 200 hours per person. (Corresponding to 9 hp credits). Notice, however, that you should count also “simple” workload like reading the project e-mails, theory study before project meetings, etc. So, it’s not 160 hours-in-front-of-the-computer-late-in-the-evenings.

Leave a Reply

Fill in your details below or click an icon to log in:

WordPress.com Logo

You are commenting using your WordPress.com account. Log Out /  Change )

Google photo

You are commenting using your Google account. Log Out /  Change )

Twitter picture

You are commenting using your Twitter account. Log Out /  Change )

Facebook photo

You are commenting using your Facebook account. Log Out /  Change )

Connecting to %s

This site uses Akismet to reduce spam. Learn how your comment data is processed.