To be able to fit the presentation in the two hour slot and also give some general course information during the last lecture of the ATIK course I will talk about:
- Nyquist-rate, 14-bit DAC
We will look into the design considerations for a 500-MHz, 1.2-V, 14-bit Nyquist-rate DAC. I intend to cover the following bullets:
- Choice of main architecture
- Choice of unit element architecture
- Sanity check of specification
- Termination and impedance levels
- Biasing – design of bias scheme and effect of distributed biasing
- Special techniques to improve performance: DWA, DEM, etc.
- High-speed switch design and its implications
So the lecture will touch upon the first three and two second last lectures of the ATIK course. I will only include some general discussions on switches and amplifiers from the other lectures. That means, the switched-capacitor and filter parts are not directly covered by this lecture.
In conjunction with this presentation, you will in the lab area find
- doc/atik/ANTIK_0019: Design report and slides
- oa/atikCaseStudy*: Cadence OA libraries that are invoked in your normal setup.
- m/*.m matlab files: In your lab area, if you launch
mlabjavayou will get access to some of the files illustrating DWA and DEM techniques.